在一个快速逻辑FPGA中的调制直接数字频率合成器

在一个快速逻辑FPGA中的调制直接数字频率合成器(中文5900字,英文4700字)
DDS（直接数字频率合成）总的介绍
在探讨许多复杂的相位连续的调制技术中，对模拟电路中输出波形的控制已经越来越困难。在这些设计中，使用非线性数字式设计除去电路板需要的调整额外输出和温度。一个适合这个目标的数字式设计就是直接数字频率合成器（DDS）。一个DDS系统仅仅使用一个恒定参考时钟输入和将该时钟分解为指定的量化数位频率输出或者对参考时钟频率取样。这种形式是频率控制使得DDS系统成为需要精确频率扫描比如雷达尖叫声或者快速频率计量器的理想系统。根据数字输入控制字以控制输出频率，DDS系统可以用来当作一个允许精确频率连续改变相位的锁相环（PLL）。根据后面的说明，我们知道DDS系统还可以使用输入数字相位控制字来控制输出载波的相位。用数字式控制载波相位，很容易产生一个高频谱密度的相位调制载波。

Modulating Direct Digital Synthesizer in a QuickLogic FPGA
DDS Overview:
In the pursuit of more complex phase continuous modulation techniques, the control of the output waveform becomes increasingly more difficult with analog circuitry. In these designs, using a non-linear digital design eliminates the need for circuit board adjustments over yield and temperature. A digital design that meets these goals is a Direct Digital Synthesizer DDS. A DDS system simply takes a constant reference clock input and divides it down a to a specified output frequency digitally quantized or sampled at the reference clock frequency. This form of frequency control makes DDS systems ideal for systems that require precise frequency sweeps such as radar chirps or fast frequency hoppers. With control of the frequency output derived from the digital input word, DDS systems can be used as a PLL allowing precise frequency changes phase continuously. As will be shown, DDS systems can also be designed to control the phase of the output carrier using a digital phase word input. With digital control over the carrier phase, a high spectral density phase modulated carrier can easily be generated.